Implement UART closer to how it's done on the sifive board
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parent
844ad3b073
commit
616f70bfa4
2 changed files with 19 additions and 7 deletions
20
src/vm.cpp
20
src/vm.cpp
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@ -37,9 +37,13 @@ void UART::read_mem_u8(uint8_t* dst, size_t addr) {
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}
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addr -= UART_ADDR;
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switch (addr) {
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case UART_LSR:
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// Always ready to transmit
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*dst = LSR_TRANSMITTER_EMPTY;
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case UART_RXDATA:
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*dst = 0x0;
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break;
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case UART_RXDATA + 3:
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// receiver is always empty for now
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*dst = 0x80;
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break;
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default:
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*dst = 0;
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}
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@ -52,7 +56,7 @@ void UART::write_mem_u8(uint8_t* src, size_t addr) {
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}
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addr -= UART_ADDR;
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switch (addr) {
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case UART_THR:
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case UART_TXDATA:
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std::cout.put(static_cast<char>(*src));
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break;
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}
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@ -66,6 +70,14 @@ void UART::write_mem_u32(uint32_t* src, size_t addr) {
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}
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}
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void UART::read_mem_u32(uint32_t* dst, size_t addr) {
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uint8_t* d = (uint8_t*)dst;
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for (size_t i = 0; i < 4; i++) {
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read_mem_u8(d + i, addr + i);
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}
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}
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void Timer::update() {
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using Clock = std::chrono::high_resolution_clock;
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constexpr auto den = Clock::period::den;
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@ -78,12 +78,12 @@ class UART final : public Device {
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virtual void write_mem_u32(uint32_t *src, size_t addr);
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virtual void read_mem_u8(uint8_t *dst, size_t addr);
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virtual void read_mem_u32(uint32_t *dst, size_t addr);
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private:
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enum Registers {
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UART_RBR = 0x00, // Receiver Buffer Register
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UART_THR = 0x00, // Transmitter Holding Register
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UART_LSR = 0x05 // Line Status Register
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UART_TXDATA = 0x00,
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UART_RXDATA = 0x04,
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};
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// Line Status Register bits
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